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【求助】 n101移植非官方FPGA开发板，二线JTAG调试openocd连不上JTAG

发表于 开源蜂鸟E203 2022-03-03 13:20:23
20
9075
1
ftdi not signal layout use DEPRECATED

移植n101软核到非官方指定的FPGA板卡中（XC7A100TFGG676-1),蜂鸟调试器连接JTAG接口（二线JTAG调试），在使用openocd连接JTAG时，发现有报错，如下所示：
D:\OpenOCD\bin>openocd -f openocd_hbird.cfg
Open On-Chip Debugger 0.11.0 (2021-11-18) [https://github.com/sysprogs/openocd]
Licensed under GNU GPL v2
libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
DEPRECATED! use ‘adapter speed’ not ‘adapter_khz’
DEPRECATED! use ‘adapter driver’ not ‘interface’
DEPRECATED! use ‘ftdi vid_pid’ not ‘ftdi_vid_pid’
DEPRECATED! use ‘ftdi layout_init’ not ‘ftdi_layout_init’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
DEPRECATED! use ‘ftdi layout_signal’ not ‘ftdi_layout_signal’
Info : auto-selecting first available session transport “jtag”. To override use ‘transport select ‘.
Info : clock speed 1000 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway…
Error: riscv.cpu: IR capture error; saw 0x1f not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: Unsupported DTM version: 15
Warn : target riscv.cpu examination failed
Info : starting gdb server for riscv.cpu on 3333
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet
Error: Unsupported DTM version: 15
接口连线正确，有人遇到过这种情况吗？应该怎么解决？多谢！！！！

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用户评论 (20)
  • 小佳

    2023-07-10 15:39:30 小佳 1#

    ：

    使用的就是V2，Debugger Kit V2

    请问这个V2和V1版本的主要区别是，FTDI芯片的型号不同么？

    回复 0

  • 2022-03-04 16:32:30 2#

    胡灿：

      “assign jtag_TMS=jtag_DRV_TMS?jtag_TMS_out:1'bz;

        assign jtag_TMS_in=jtag_TMS;”  


    这个地方TMS信号的处理，参考原N101的工程来改一下吧，用IOBUF来处理，在约束里面带上KEEP属性。


    又报这样的错了：

    Open On-Chip Debugger 0.11.0+dev-01889-geee887d60 (2022-01-13-23:33)

    Licensed under GNU GPL v2

    For bug reports, read

            http://openocd.org/doc/doxygen/bugs.html

    DEPRECATED! use 'adapter speed' not 'adapter_khz'

    DEPRECATED! use 'adapter driver' not 'interface'

    Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.

    Info : Using libusb driver

    Info : clock speed 1000 kHz

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Error: JTAG scan chain interrogation failed: all ones

    Error: Check JTAG interface, timings, target power, etc.

    Error: Trying to use configured scan chain anyway...

    Error: riscv.cpu: IR capture error; saw 0x1f not 0x01

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: Unsupported DTM version: 15

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet

    Error: Unsupported DTM version: 15

    回复 0
  • 胡灿

    2022-03-04 15:52:38 胡灿 3#

      “assign jtag_TMS=jtag_DRV_TMS?jtag_TMS_out:1'bz;

        assign jtag_TMS_in=jtag_TMS;”  


    这个地方TMS信号的处理，参考原N101的工程来改一下吧，用IOBUF来处理，在约束里面带上KEEP属性。


    回复 0

  • 2022-03-04 10:20:01 4#

    ：

    还是报错，但是和前几次的不一样，如下：

    Open On-Chip Debugger 0.11.0+dev-01889-geee887d60 (2022-01-13-23:33)

    Licensed under GNU GPL v2

    For bug reports, read

     http://openocd.org/doc/doxygen/bugs.html

    DEPRECATED! use 'adapter speed' not 'adapter_khz'

    DEPRECATED! use 'adapter driver' not 'interface'

    Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.

    Info : Using libusb driver

    Info : clock speed 1000 kHz

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Info : JTAG tap: riscv.cpu tap/device found: 0x82000211 (mfg: 0x108 (Ardent Technologies), part: 0x2000, ver: 0x8)

    Info : TAP auto0.tap does not have valid IDCODE (idcode=0x2494aa94)

    Info : TAP auto1.tap does not have valid IDCODE (idcode=0x924a554a)

    Info : JTAG tap: auto2.tap tap/device found: 0x49252aa5 (mfg: 0x552 (NOR-MEM), part: 0x9252, ver: 0x4)

    Info : TAP auto3.tap does not have valid IDCODE (idcode=0x25249124)

    Info : TAP auto4.tap does not have valid IDCODE (idcode=0x92924892)

    Info : JTAG tap: auto5.tap tap/device found: 0x49492449 (mfg: 0x224 (Raza Microelectronics), part: 0x9492, ver: 0x4)

    Info : TAP auto6.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto7.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto8.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto9.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto10.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto11.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto12.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto13.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto14.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto15.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto16.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto17.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto18.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto19.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Warn : Unexpected idcode after end of chain: 331 0x92492492

    Warn : Unexpected idcode after end of chain: 363 0x24924924

    Warn : Unexpected idcode after end of chain: 395 0x49249249

    Warn : Unexpected idcode after end of chain: 427 0x92492492

    Warn : Unexpected idcode after end of chain: 459 0x24924924

    Warn : Unexpected idcode after end of chain: 491 0x49249249

    Warn : Unexpected idcode after end of chain: 523 0x92492492

    Warn : Unexpected idcode after end of chain: 555 0x24924924

    Warn : Unexpected idcode after end of chain: 587 0x49249249

    Warn : Unexpected idcode after end of chain: 619 0x92492492

    Error: double-check your JTAG setup (interface, speed, ...)

    Error: Trying to use configured scan chain anyway...

    Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 2 -expected-id 0x00000000"

    Error: auto0.tap: IR capture error; saw 0x0000 not 0x0001

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: dtmcontrol is 0. Check JTAG connectivity/board power.

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet


    cfg配置文件如下：

    adapter_khz 1000

    interface ftdi

    #ftdi_device_desc "USB <-> JTAG-DEBUGGER"

    ftdi_vid_pid 0x0403 0x6010

    ftdi_oscan1_mode on

    ftdi_layout_init 0x0008 0x001b

    ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020

    ftdi_layout_signal TCK -data 0x0001

    ftdi_layout_signal TDI -data 0x0002

    ftdi_layout_signal TDO -input 0x0004

    ftdi_layout_signal TMS -data 0x0008

    ftdi_layout_signal JTAG_SEL -data 0x0100 -oe 0x0100

    #Reset Stretcher logic on FE310 is ~1 second long

    #This doesn't apply if you use

    # ftdi_set_signal, but still good to document

    #adapter_nsrst_delay 1500

    set _CHIPNAME riscv

    jtag newtap $_CHIPNAME cpu -irlen 5

    set _TARGETNAME $_CHIPNAME.cpu

    target create $_TARGETNAME riscv -chain-position $_TARGETNAME

    $_TARGETNAME configure -work-area-phys 0x80000 -work-area-size 10000 -work-area-backup 1

    init

    #reset

    if {[ info exists pulse_srst]} {

      ftdi_set_signal nSRST 0

      ftdi_set_signal nSRST z

    }

    halt

    回复 0

  • 2022-03-03 18:00:09 5#

    胡灿：

    约束里面加上这个吧

    set_property KEEPER true [get_ports  jtag_TMS]

    还是报错，但是和前几次的不一样，如下：

    Open On-Chip Debugger 0.11.0+dev-01889-geee887d60 (2022-01-13-23:33)

    Licensed under GNU GPL v2

    For bug reports, read

     http://openocd.org/doc/doxygen/bugs.html

    DEPRECATED! use 'adapter speed' not 'adapter_khz'

    DEPRECATED! use 'adapter driver' not 'interface'

    Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.

    Info : Using libusb driver

    Info : clock speed 1000 kHz

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Info : JTAG tap: riscv.cpu tap/device found: 0x82000211 (mfg: 0x108 (Ardent Technologies), part: 0x2000, ver: 0x8)

    Info : TAP auto0.tap does not have valid IDCODE (idcode=0x2494aa94)

    Info : TAP auto1.tap does not have valid IDCODE (idcode=0x924a554a)

    Info : JTAG tap: auto2.tap tap/device found: 0x49252aa5 (mfg: 0x552 (NOR-MEM), part: 0x9252, ver: 0x4)

    Info : TAP auto3.tap does not have valid IDCODE (idcode=0x25249124)

    Info : TAP auto4.tap does not have valid IDCODE (idcode=0x92924892)

    Info : JTAG tap: auto5.tap tap/device found: 0x49492449 (mfg: 0x224 (Raza Microelectronics), part: 0x9492, ver: 0x4)

    Info : TAP auto6.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto7.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto8.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto9.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto10.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto11.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto12.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto13.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto14.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto15.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto16.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto17.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Info : TAP auto18.tap does not have valid IDCODE (idcode=0x92492492)

    Info : JTAG tap: auto19.tap tap/device found: 0x49249249 (mfg: 0x124 (Peregrine Semiconductor), part: 0x9249, ver: 0x4)

    Warn : Unexpected idcode after end of chain: 331 0x92492492

    Warn : Unexpected idcode after end of chain: 363 0x24924924

    Warn : Unexpected idcode after end of chain: 395 0x49249249

    Warn : Unexpected idcode after end of chain: 427 0x92492492

    Warn : Unexpected idcode after end of chain: 459 0x24924924

    Warn : Unexpected idcode after end of chain: 491 0x49249249

    Warn : Unexpected idcode after end of chain: 523 0x92492492

    Warn : Unexpected idcode after end of chain: 555 0x24924924

    Warn : Unexpected idcode after end of chain: 587 0x49249249

    Warn : Unexpected idcode after end of chain: 619 0x92492492

    Error: double-check your JTAG setup (interface, speed, ...)

    Error: Trying to use configured scan chain anyway...

    Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 2 -expected-id 0x00000000"

    Error: auto0.tap: IR capture error; saw 0x0000 not 0x0001

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: dtmcontrol is 0. Check JTAG connectivity/board power.

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet


    回复 0
  • 胡灿

    2022-03-03 17:33:47 胡灿 6#

    ：

    约束：

    # 时钟引脚

    set_property IOSTANDARD LVCMOS33 [get_ports clk50mhz]

    set_property PACKAGE_PIN U22 [get_ports clk50mhz]

    # 复位引脚

    set_property IOSTANDARD LVCMOS33 [get_ports rst_n]

    set_property PACKAGE_PIN AC26 [get_ports rst_n]

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_rst]

    set_property PACKAGE_PIN P4 [get_ports jtag_rst]

    # JTAG TCK引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK]

    set_property PACKAGE_PIN E26 [get_ports jtag_TCK]

    set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets jtag_TCK]

    # JTAG TMS引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS]

    set_property PACKAGE_PIN E25 [get_ports jtag_TMS]

    #串口tx

    set_property IOSTANDARD LVCMOS33 [get_ports tx_evt]

    set_property PACKAGE_PIN G22 [get_ports tx_evt]

    #串口rx

    set_property IOSTANDARD LVCMOS33 [get_ports rx_evt]

    set_property PACKAGE_PIN J25 [get_ports rx_evt]

    顶层TOP：

    module n101_core_100T_top(

      input jtag_TCK,

      inout jtag_TMS,

      //input jtag_TDI,

      output jtag_dwen,

      output tx_evt,

      input rx_evt,

      //input i_dbg_stop,

      input jtag_rst,

      input clk50mhz,

      input rst_n

      );

        //wire jtag_TDI_IN;

        wire jtag_TMS_out;

        wire jtag_DRV_TMS;

        wire jtag_TMS_in;

        //assign jtag_TDI_IN=jtag_TDI;

        assign jtag_TMS=jtag_DRV_TMS?jtag_TMS_out:1'bz;

        assign jtag_TMS_in=jtag_TMS;

      n101_core_wrapper n101_core_wrapper(

                           .jtag_TCK(jtag_TCK),

                           .jtag_TMS_in(jtag_TMS_in),

                           .jtag_TDI(),

                           .jtag_TDO(),

                           .jtag_DRV_TDO(),

                           .jtag_dwen(jtag_dwen),

                           .jtag_TMS_out(jtag_TMS_out),

                           .jtag_DRV_TMS(jtag_DRV_TMS),

                           .jtag_BK_TMS(),

                           .hart_halted(),

                           .i_dbg_stop(1'b0),

                           .sysrstreq(),

                           .core_clk_aon(clk50mhz),

                           .core_clk(clk50mhz),

                           .core_reset_n(rst_n),

                           .por_reset_n(jtag_rst),

                           .reset_bypass(1'b0),

                           .clkgate_bypass(1'b1),

                           .mtime_toggle_a(1'b1),

                           .dbg_toggle_a(1'b1),

                           .clic_irq(2'b00),

                           .htrans(),

                           .hwrite(),

                           .hsize(),

                           .hburst(),

                           .hmastlock(),

                           .hwdata(),

                           .hprot(),

                           .master(),

                           .hrdata(32'd0),

                           .hresp(2'b00),

                           .hready(1'b1),

                           .tx_evt(tx_evt),

                           .rx_evt(rx_evt),

                           .core_wfi_mode(),

                           .hart_id(32'h0),

                           .reset_vector(20'd0),

                           .core_sleep_value()

      );

    endmodule

    约束里面加上这个吧

    set_property KEEPER true [get_ports  jtag_TMS]

    回复 0

  • 2022-03-03 17:33:14 7#

    ：

    约束：

    # 时钟引脚

    set_property IOSTANDARD LVCMOS33 [get_ports clk50mhz]

    set_property PACKAGE_PIN U22 [get_ports clk50mhz]

    # 复位引脚

    set_property IOSTANDARD LVCMOS33 [get_ports rst_n]

    set_property PACKAGE_PIN AC26 [get_ports rst_n]

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_rst]

    set_property PACKAGE_PIN P4 [get_ports jtag_rst]

    # JTAG TCK引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK]

    set_property PACKAGE_PIN E26 [get_ports jtag_TCK]

    set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets jtag_TCK]

    # JTAG TMS引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS]

    set_property PACKAGE_PIN E25 [get_ports jtag_TMS]

    #串口tx

    set_property IOSTANDARD LVCMOS33 [get_ports tx_evt]

    set_property PACKAGE_PIN G22 [get_ports tx_evt]

    #串口rx

    set_property IOSTANDARD LVCMOS33 [get_ports rx_evt]

    set_property PACKAGE_PIN J25 [get_ports rx_evt]

    顶层TOP：

    module n101_core_100T_top(

      input jtag_TCK,

      inout jtag_TMS,

      //input jtag_TDI,

      output jtag_dwen,

      output tx_evt,

      input rx_evt,

      //input i_dbg_stop,

      input jtag_rst,

      input clk50mhz,

      input rst_n

      );

        //wire jtag_TDI_IN;

        wire jtag_TMS_out;

        wire jtag_DRV_TMS;

        wire jtag_TMS_in;

        //assign jtag_TDI_IN=jtag_TDI;

        assign jtag_TMS=jtag_DRV_TMS?jtag_TMS_out:1'bz;

        assign jtag_TMS_in=jtag_TMS;

      n101_core_wrapper n101_core_wrapper(

                           .jtag_TCK(jtag_TCK),

                           .jtag_TMS_in(jtag_TMS_in),

                           .jtag_TDI(),

                           .jtag_TDO(),

                           .jtag_DRV_TDO(),

                           .jtag_dwen(jtag_dwen),

                           .jtag_TMS_out(jtag_TMS_out),

                           .jtag_DRV_TMS(jtag_DRV_TMS),

                           .jtag_BK_TMS(),

                           .hart_halted(),

                           .i_dbg_stop(1'b0),

                           .sysrstreq(),

                           .core_clk_aon(clk50mhz),

                           .core_clk(clk50mhz),

                           .core_reset_n(rst_n),

                           .por_reset_n(jtag_rst),

                           .reset_bypass(1'b0),

                           .clkgate_bypass(1'b1),

                           .mtime_toggle_a(1'b1),

                           .dbg_toggle_a(1'b1),

                           .clic_irq(2'b00),

                           .htrans(),

                           .hwrite(),

                           .hsize(),

                           .hburst(),

                           .hmastlock(),

                           .hwdata(),

                           .hprot(),

                           .master(),

                           .hrdata(32'd0),

                           .hresp(2'b00),

                           .hready(1'b1),

                           .tx_evt(tx_evt),

                           .rx_evt(rx_evt),

                           .core_wfi_mode(),

                           .hart_id(32'h0),

                           .reset_vector(20'd0),

                           .core_sleep_value()

      );

    endmodule

    jtag_rst直接约束位FPGA板上的复位按键，蜂鸟调试器上的rst管脚是悬空的

    回复 0

  • 2022-03-03 17:31:26 8#

    胡灿：

    JTAG的约束也发出来看看吧

    约束：

    # 时钟引脚

    set_property IOSTANDARD LVCMOS33 [get_ports clk50mhz]

    set_property PACKAGE_PIN U22 [get_ports clk50mhz]

    # 复位引脚

    set_property IOSTANDARD LVCMOS33 [get_ports rst_n]

    set_property PACKAGE_PIN AC26 [get_ports rst_n]

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_rst]

    set_property PACKAGE_PIN P4 [get_ports jtag_rst]

    # JTAG TCK引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK]

    set_property PACKAGE_PIN E26 [get_ports jtag_TCK]

    set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets jtag_TCK]

    # JTAG TMS引脚

    set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS]

    set_property PACKAGE_PIN E25 [get_ports jtag_TMS]

    #串口tx

    set_property IOSTANDARD LVCMOS33 [get_ports tx_evt]

    set_property PACKAGE_PIN G22 [get_ports tx_evt]

    #串口rx

    set_property IOSTANDARD LVCMOS33 [get_ports rx_evt]

    set_property PACKAGE_PIN J25 [get_ports rx_evt]

    顶层TOP：

    module n101_core_100T_top(

      input jtag_TCK,

      inout jtag_TMS,

      //input jtag_TDI,

      output jtag_dwen,

      output tx_evt,

      input rx_evt,

      //input i_dbg_stop,

      input jtag_rst,

      input clk50mhz,

      input rst_n

      );

        //wire jtag_TDI_IN;

        wire jtag_TMS_out;

        wire jtag_DRV_TMS;

        wire jtag_TMS_in;

        //assign jtag_TDI_IN=jtag_TDI;

        assign jtag_TMS=jtag_DRV_TMS?jtag_TMS_out:1'bz;

        assign jtag_TMS_in=jtag_TMS;

      n101_core_wrapper n101_core_wrapper(

                           .jtag_TCK(jtag_TCK),

                           .jtag_TMS_in(jtag_TMS_in),

                           .jtag_TDI(),

                           .jtag_TDO(),

                           .jtag_DRV_TDO(),

                           .jtag_dwen(jtag_dwen),

                           .jtag_TMS_out(jtag_TMS_out),

                           .jtag_DRV_TMS(jtag_DRV_TMS),

                           .jtag_BK_TMS(),

                           .hart_halted(),

                           .i_dbg_stop(1'b0),

                           .sysrstreq(),

                           .core_clk_aon(clk50mhz),

                           .core_clk(clk50mhz),

                           .core_reset_n(rst_n),

                           .por_reset_n(jtag_rst),

                           .reset_bypass(1'b0),

                           .clkgate_bypass(1'b1),

                           .mtime_toggle_a(1'b1),

                           .dbg_toggle_a(1'b1),

                           .clic_irq(2'b00),

                           .htrans(),

                           .hwrite(),

                           .hsize(),

                           .hburst(),

                           .hmastlock(),

                           .hwdata(),

                           .hprot(),

                           .master(),

                           .hrdata(32'd0),

                           .hresp(2'b00),

                           .hready(1'b1),

                           .tx_evt(tx_evt),

                           .rx_evt(rx_evt),

                           .core_wfi_mode(),

                           .hart_id(32'h0),

                           .reset_vector(20'd0),

                           .core_sleep_value()

      );

    endmodule

    回复 0

  • 2022-03-03 17:29:19 9#

    胡灿：

    那连线是如何连的呢

    TMS和TCK分别使用杜邦线手工连接FPGA板上对应的约束好的管脚，vcc3v3接板卡上3.3v管脚，GND接地

    回复 0
  • 胡灿

    2022-03-03 17:29:00 胡灿 10#

    JTAG的约束也发出来看看吧

    回复 0
  • 胡灿

    2022-03-03 17:21:55 胡灿 11#

    ：

    改了，还是报相同的错，如下：

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Error: JTAG scan chain interrogation failed: all zeroes

    Error: Check JTAG interface, timings, target power, etc.

    Error: Trying to use configured scan chain anyway...

    Error: riscv.cpu: IR capture error; saw 0x00 not 0x01

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: dtmcontrol is 0. Check JTAG connectivity/board power.

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet


    那连线是如何连的呢

    回复 0

  • 2022-03-03 17:13:35 12#

    ：

    改了，还是报相同的错，如下：

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Error: JTAG scan chain interrogation failed: all zeroes

    Error: Check JTAG interface, timings, target power, etc.

    Error: Trying to use configured scan chain anyway...

    Error: riscv.cpu: IR capture error; saw 0x00 not 0x01

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: dtmcontrol is 0. Check JTAG connectivity/board power.

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet


    看错了，不是报all ones了，而是报 all zeros

    回复 0

  • 2022-03-03 17:08:05 13#

    胡灿：

    看了下配置文件，还有个地方对应改成如下

    ftdi_layout_signal JTAG_SEL -data 0x0100 -oe 0x0100

    改了，还是报相同的错，如下：

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Error: JTAG scan chain interrogation failed: all zeroes

    Error: Check JTAG interface, timings, target power, etc.

    Error: Trying to use configured scan chain anyway...

    Error: riscv.cpu: IR capture error; saw 0x00 not 0x01

    Info : hbird_debugger: This TAP's version is too old, trying use async sequence to handshake..

    Warn : Bypassing JTAG setup events due to errors

    Error: dtmcontrol is 0. Check JTAG connectivity/board power.

    Warn : target riscv.cpu examination failed

    Info : starting gdb server for riscv.cpu on 3333

    Info : Listening on port 3333 for gdb connections

    Error: Target not examined yet


    回复 0
  • 胡灿

    2022-03-03 17:03:20 胡灿 14#

    ：

    四线没有问题


    看了下配置文件，还有个地方对应改成如下

    ftdi_layout_signal JTAG_SEL -data 0x0100 -oe 0x0100

    回复 0

  • 2022-03-03 15:12:45 15#

    胡灿：

    4线连接有问题吗？

    四线没有问题


    回复 0
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